1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, in particular formation of a trench isolation.
2. Discussion of Background
FIGS. 17a through 17c show a method of forming a trench isolation disclosed in Japanese Unexamined Patent Publication No. Hei 3-30300 (JP-A-3-30300) as a conventional technique, wherein an etching mask having a structure of laminating a polycrystalline silicon film and a silicon nitride film is used at the time of forming an opening portion of trench; a sputter etching is conducted using the polycrystalline silicon film as an etching stopper after the trench isolation is formed by embedding an insulating film in the trench opening portion; and the etching mask is removed by a wet etching or a dry etching in order to expose a surface of semiconductor substrate and leave the trench isolation.
As shown in FIG. 17a, after a silicon oxide film 102 is formed on a surface of semiconductor substrate 101 by a thermal oxidation method, a silicon nitride film 103 and a polycrystalline silicon film 104 are successively laminated by a chemical vapor deposition (CVD) method. The silicon nitride film 103 and the polycrystalline silicon film 104 are used as a mask for opening trench, and the silicon nitride film 103 serves as a protection film in the later step of heat treatment process. After a mask pattern having a cripping pattern corresponding to the trench isolation by patterning the polycrystalline silicon film 104 and the silicon nitride film 103, a trench opening portion 105 having a width of 1 .mu.m is opened in the semiconductor substrate 101 using this mask pattern.
Thereafter, as shown in FIG. 17b, a silicon oxide film 106 is formed in an inner wall and a bottom surface of the trench opening portion 105 by a heat treatment, a silicon oxide film 107 is formed by a CVD method or a thermal oxidation method to embed in the trench opening portion 105. Further, a photoresist 108 is laminated on a surface of silicon oxide film 107.
In the next, as shown in FIG. 17c, the photoresist 108 and the silicon oxide film 107 both positioned over the surface of polycrystalline silicon film 104 are removed by a sputter etching. Thereafter, as shown in FIG. 17b, the polycrystalline silicon film 104 is removed by a wet etching or a dry etching, and simultaneously a part of the silicon oxide film 107 exists within the same thickness as that of the polycrystalline silicon film 104 is removed. In this, the property of the silicon oxide film 107 is made dense by a heat treatment.
In the next, as shown in FIG. 17e, the silicon oxide film 103 is removed by a wet etching or a dry etching; the silicon oxide film 102 is removed; and simultaneously a part of the silicon oxide film 107 existing above the surface of semiconductor substrate 101 is selectively removed, whereby the trench isolation made of the silicon oxide films 106 and 107 is obtainable in the trench opening portion 105.
In this, the polycrystalline silicon film 104 is used as a stopper film for etching back the silicon oxide film 107 which is an insulating film for embedding. In addition, the silicon nitride film 103 is used as a mask at the time of heat treatment for making the property of silicon oxide film 107 dense, which serves as an oxide film of the trench isolation. Accordingly, the semiconductor substrate 101 which becomes an active region is not damaged nor contaminated.
However, when the size of trench isolation becomes small by microminiaturization of elements of the semiconductor device, the following problems occur.
FIG. 18 is a cross-sectional view in a case that a trench opening portion 105a having an opening width s as the minimum feature size and a trench opening portion 105b having a larger opening width than the minimum feature size were opened using a mask pattern 109 as an etching mask.
In this case, when a silicon oxide film 108a is formed by a low pressure CVD method, the trench opening portions 105a having the opening widths of the minimum feature size could not be embedded by an insulating film, whereby a seam (space) 110 appears. As a result, such a seam was left as a recessed portion in a stage of obtaining a trench isolation, and a conductive material was left by, for example, being embedded in the recessed portion in a later step of forming an active element, thereby to possibly cause a short, where the trench isolation obtainable by embedding the insulating film in the trench opening portion 105b is designated by numeral 107b.
An example of embedding a trench having microminiture size by a high density plasma-chemical vapor deposition (HDP-CVD) method is described in the following, instead of the embedding by a low pressure CVD method. FIG. 19 is a cross-sectional view of a case that the silicon oxide film 108b formed by an HDP-CVD method is used to embed the inside of trench opening portion 105a having a minimum feature size. In FIG. 19, numerals 109a, 109b and 109c designate mask patterns having dimensions in the horizontal direction in this cross-sectional view are respectively Xa, Xb and Xc, where Xa&lt;Xb&lt;Xc. Xa is a size corresponding to the minimum feature size. The numerals already used in the above description designate the same or the similar portions.
When the film is formed by the HDP-CVD method, it is possible to embed satisfactorily without causing a seam even for a microminiture opening dimension because the silicon oxide film 108b used for embedding the trench opening portion 105a is laminated and simultaneously corner portions of the laminated film are etched intensively.
When the silicon oxide film 108b laminated by the HDP-CVD method is formed with an angle of 45.degree. in the mask patterns 109a, 109b and 109c, it becomes a film having shapes of isosceles triangle in its section, of which heights are ha and hb corresponding halves of Xa and Xb respectively, on the mask patterns 109a and 109b. In a large mask such as the mask patterns 109c, the silicon oxide film 108b having a thickness of hc which corresponds to a film thickness of laminated film for embedding in the trench opening portion 105a at most.
As a method of removing an excessive part of the silicon oxide film 108b laminated on the mask patterns 109a, 109b and 109c, abrasion by a chemical mechanical polishing (CMP) method or a dry etching, conducted selectively using an etching mask, can be considered.
However, the abrasion by CMP method was not suitable for treatment of an area where many silicon oxide films 108b as thick as that laminated on the mask pattern 109c. This was because of a matter of planarity in a surface to be processed which was obtainable after the treatment. Because, in the mask pattern 109a, a surface having an even height was not obtainable between in a region formed with many silicon oxide films 108b having a small film thickness and in a region formed with many silicon oxide films 108b having a large film thickness after planarizing by the CMP method, this affection was left in the region having the silicon oxide films 108b having a large film thickness after the planarization, whereby the surface was formed in a higher position than that in the other region.
Further, because the abrasion by the CMP method required a high cost, it was not suitable for the etching with respect to a thick film.
In FIGS. 20a and 20b, a case that the silicon oxide film 108b on the mask patterns 109a, 109b and 109c are removed by a selective dry etching. At first, as shown in FIG. 20a, resist patterns 111 are formed on regions which will be trench isolation 107a, namely, trench opening portions 105a. However, deviations x in alignment occur when the resist patterns 111 are not formed completely in conformity with the upsides of trench opening portions 105a.
Thereafter, as shown in FIG. 20b, an excessive silicon oxide film 108b is removed by a dry etching using the resist patterns 111 as an etching mask. However, when the mask patterns 109a, 109b and 109c are made of a silicon nitride film, the etching is overly conducted in a region where the film thickness of silicon oxide film 108b positioned on the mask patterns 109a, 109b and 109c is small to thereby cause scrapes A, B and C because a selective ratio between the silicon oxide film 108b and the silicon nitride film 109c is not sufficiently assured. Thus, there was a problem that a part of the trench isolation 107a is scraped because of the deviation x in alignment; and parts of the mask patterns 109a, 109b and 109c positioned in the active region and a part of the active region are scraped because the mask patterns 109a, 109b and 109c do not have a stopper in their upper-most layers.